Sale!

Program Optimization for Multi-core Architectures Lecture Note

Original price was: ₹199.00.Current price is: ₹0.00.

Description

Name of Notes : – Program Optimization for Multi-core Architectures Lecture Note

Introduction

Microprocessor design is experiencing a shift away from a predominant focus on pure performance to a balanced approach that optimizes for power as well as performance.

Multi-core processors continue this trend and are capable of sharing work and executing tasks on independent execution cores concurrently. In many cases, taking full advantage of the performance benefits of these processors will require developers to thread their applications.

Multi-core processors are comprised of multiple processor cores in the same package and offer increased performance, but at a cost to the embedded developer. In many cases, taking advantage of the performance benefits requires developers to thread their applications. Effectively threading an application is a nontrivial task that requires domain knowledge in multi-core architecture, parallelism fundamentals, and threading methodology.

This article is focused on three main topics: (1) an overview of multi-core processor architecture and the benefit that multi-core processors offer; (2) a primer on parallelism and discusses key topics such as scalability, parallelism& threading techniques, and, (3) a threading methodology which can be employed to effectively thread, optimize, and debug an application.

Modules / Lectures

  • Multi-core: The Ultimate Dose of Moore’s Law
  • Virtual Memory and Caches
  • Fundamentals of Parallel Computers: ILP vs TLP
  • Parallel Programming: Shared Memory and Message Passing
  • Performance Issues in Shared Memory and Introduction to Coherence
  • Shared Memory Multiprocessors: Consistency and Coherence
  • Synchronization
  • Memory Consistency Models and Case Studies of Multi-core
  • Addendum to Module 6: Shared Memory Multiprocessors
  • Open Multi-Processing
  • The “last private” Clause
  • View
  • INTRODUCTION TO COMPILERS FOR HIGH PERFORMANCE COMPUTERS
  • Approaches to Control Flow Analysis
  • Reaching Definition
  • Data Flow Analysis in Presence of Procedure Calls
  • Loops
  • Loop Optimizations
  • Multi-core computing Operating Systems
  • Multi-core Computing Multi-processor Scheduling
  • Problem and Solution
  • Multi-core Computing Security

Additional information

Product Name

Program Optimization for Multi-core Architectures Lecture Note

Product Size

5.26 MB

Format

File Format

File Category

DEPARTMENT/COURSE

Need For

College, Competition, Entrance, Exams, PSU, Semester, University

Product Type

Written By

Dr. Mainak Chaudhuri, Prof. Rajat Moona, Prof. Sanjeev K Aggarwal

Provided By

IIT Kanpur

Uploaded By

Roop Chandra

Languages

English

Reviews

There are no reviews yet

Add a review
You must be logged in to post a review Log In
No more offers for this product!